Category: Workshop

  • FPGA Night (15 Oct, 7-10PM)

    This will be the last class on VGA before moving to CPUs. We will be modifying our code to draw multiple lines of text on the screen. Required Items: 1. Laptop with Xilinx ISE installed. Please ensure you already have the ISE installed!! We will not have time to wait for the install process to…

  • FPGA Night (8 Oct, 7-10PM)

    We will continue our work with VGA monitors. I have new code that we will be using to draw binary values with. If time permits, we will cover basic bitmaps. Required Items: 1. Laptop with Xilinx ISE installed. Please ensure you already have the ISE installed!! We will not have time to wait for the…

  • 3 Year Anniversary of Unallocated Space this Saturday!!

    Let’s talk food and drink. Bring something to share. You’re thinking bacon, right? Or maybe homemade sweet potato pie. I hear folks love kabobs. The grill is going to be working overtime. What you’re bringing is entirely up to you. This is you’re opportunity to show off that special recipe and that fancy pants imported…

  • FPGA Night (1 Oct, 7-10PM)

    We will continue working with LCD monitors. The plan is to create a binary counter display that can display like a series of LEDs. We will start with one 8 bit vector and move on to showing multiple integers. Required Items: 1. Laptop with Xilinx ISE installed. Please ensure you already have the ISE installed!!…

  • FPGA Night (24 Sep, 7-10PM)

    We will continue to work on VGA by creating a VHDL module that can run off of a variable timing (defined at time of creation) and then creating a package that defines a series of VGA timings that the new VHDL module can use. If time permits, we will start talking about ideas for displaying…

  • FPGA Night (17 Sep, 7-10PM)

    We will be continuing from last week’s VGA designs. There were problems with some people not being able to display anything on their monitors. After some tweaking of the timings, I think everything should be good to go. If you have a monitor with a VGA connection and can bring it, please do. We have…

  • Unallocated Space’s 3rd Anniversary Party and Potluck

    It’s that special time of the year again. No, not the holidays, but you’re close. It’s Unallocated Space’s 3rd Anniversary Party and Potluck. Oh Yeah! http://www.meetup.com/ticketing/ticket_printable/?event_id=139345512 Unallocated Space’s 3rd Anniversary Party and Potluck On Saturday, October 5th, 2013 from 12:00 noon to midnight, you and your guest are invited to join us to celebrate in…

  • FPGA Night (10 Sep, 7-10PM)

    We will be going over how to make an FPGA drive an LCD monitor. With any luck I will have DB15 (VGA) breakout cables made before class. For those of you who need a breakout cable, please let me know as soon as possible. If you have a monitor with VGA connector(s) and can bring…

  • FPGA Night (20 Aug, 7-10PM)

    We will continue working with Serial/EPP data transfers. Here are the goals based on dev board type: Mojo: 1. Create a FIFO to buffer data being written to the serial (from FPGA to computer) 2. Write data as quickly as possible to the FIFO until it is full, then wait for the FIFO to become…

  • FPGA Night (13 Aug, 7-10PM)

    We will continue working on sending data from the FPGA to a laptop. Required Items: 1. Laptop with Xilinx ISE installed. Please ensure you already have the ISE installed!! We will not have time to wait for the install process to complete (it usually takes 15-30 minutes). Check out http://www.xilinx.com/support/download/index.html/content/xilinx/en/downloadNav/design-tools.html and download the ISE Design…