FPGA Night 16 July (7-10PM)

We will be designing VHDL code to send data to an SN74HC595N shift register. If time permits we will create a design that reads the output of the shift register at higher speeds (> 1MHz) until the register begins to send invalid data.

Because of the cost of FPGA dev boards, we will not have extras. If you have questions about what board to get, please E-Mail fpga@unallocatedspace.org.

Since the space runs off of donations, we would like to mention that the recommended donation for this class is $10. It is by no means a requirement! Attendance to the space, and this class, is 100% free to all!